Conventionally, substrates employed in semiconductor devices have been cut into platelike ingots of compound semiconductor crystal, for example, processed into specific external shapes, surface ground, and employed as semiconductor wafers. Further, in the course of manufacturing high-performance semiconductor devices, films with few crystal defects and low impurity concentrations have been epitaxially grown on compound semiconductor substrates obtained by processing these ingots.
There are times when it is difficult to manufacture compound semiconductors as ingots, and it is sometimes technically difficult or expensive to obtain large surface area ingots. In such cases, comparatively readily obtainable semiconductor wafers such as Si substrates are sometimes employed with a means (heteroepitaxy) of forming an epitaxial layer of a desired compound semiconductor crystal on the wafer.
However, heteroepitaxy produces nonconformity in the lattice constants of the substrate crystal and the layer of crystal grown over it. Thus, crystal defects caused by this nonconformity are generated at the boundary of the substrate crystal and the layer of crystal grown over it. In compound semiconductor crystals, in particular, a greater variety of crystal defects is generated than in crystals comprised of a single element, such as planar defects (antiphase boundaries) generated at the boundary between regions in which the stacking order of constituent elements is reversed, and defects of partial crystal rotation (twins). Since such crystal defects cause a decrease in breakdown voltage and an increase in leak currents in the manufacture of semiconductor devices, they must be suppressed as much as possible. However, since planar defects of low surface energy preferentially grow during the growth of compound single crystals, such crystal defects are difficult to eliminate.
For example, when heteroepitaxially growing silicon carbide (SiC) on a Si substrate, planar defects (antiphase boundaries and twins) are generated in the SiC film. A method of reducing these planar defects has been proposed that consists of the steps of providing growth regions on a growth substrate and growing silicon carbide single crystal on these growth regions to a thickness greater than or equal to the natural thickness of the substrate in the orientation of the growth plane (Japanese Examined Patent Publication (KOKOKU) Hei 6-41400). However, the two antiphase regions contained in the SiC are characterized by expanding in mutually perpendicular orientations as the SiC increases in film thickness. Thus, it has not been possible to effectively reduce antiphase boundaries even with continued heteroepitaxial growth.
One means of eliminating crystal lattice nonconformity is to insert another layer (buffer layer) having a lattice constant falling between that of the substrate and the layer grown over it. However, for example, in cases where SiC is being grown on an Si substrate, there is no known substance that is suitable as a buffer layer. As a result, lattice constant nonconformity of 20 percent results when directly growing SiC on a Si substrate, becoming the principal cause of planar defects in the epitaxially grown layer of SiC.
In such methods of epitaxial growth on single crystalline substrates, an increase in stacking defect density due to differences in the lattice constants of the substrate material and silicon carbide often becomes a problem. In particular, since the silicon that is generally employed as the growth substrate has a high degree of lattice nonconformity with silicon carbide, numerous twins and antiphase boundaries (APBs) are generated in the silicon carbide growth layer. These become one of the principal causes of leak currents and the like, compromising the characteristics of silicon carbide electronic elements.
K. Shibahara et al. have proposed a method of growth on a silicon (001) surface substrate in which the surface normal axis is slightly tilted (in which an off angle is introduced) from the <001> direction in the <110> direction as a method of effectively reducing antiphase boundaries (Applied Physics Letter, Vol. 50, 1987, p. 1,888). In this method, antiphase boundaries generated at silicon substrate surface terraces are eliminated at the points where antiphase boundaries meet, but antiphase boundaries generated at single atom steps in the silicon substrate do not meet one another and are not eliminated.
As a method of reducing such planar defects (twins, APBs) in silicon carbide, the present inventors have proposed the technique of eliminating planar defects propagating within silicon carbide by imparting undulations extending in a direction parallel to the silicon substrate surface and epitaxially growing silicon carbide on a substrate that has been processed with such undulations (Japanese Patent Application (TOKUGAN) No. 2000-365443 and Japanese Unexamined Patent Publication (KOKAI) No. 2000-178740). This method yields silicon carbide in which planar defects are greatly reduced.
Further, compound semiconductors such as gallium nitride are expected to serve as blue LEDs and power device materials. There have been numerous reports and examples of the growth of gallium nitride on silicon carbide substrates in recent years. This is because the use of silicon carbide as a base substrate in the growth of gallium nitride affords such advantages as facilitating the formation of electrodes, permitting ready heat dissipation, and facilitating handling and processing due to an identical crystal cleavage direction. However, there are problems in that there are few high-quality silicon carbide substrates with large surface areas, and planar defects end up propagating in the gallium nitride growth layer due to boundary lattice nonconformity. Just as when growing silicon carbide on a silicon substrate, it is necessary to examine measures for eliminating defects.
To eliminate crystal defects occurring at high density with heterogeneous substrates in the crystal growth of gallium nitride (GaN), it has been proposed that a layer blocking the growth of GaN be provided during the growth process and the fact that selectively grown GaN grows horizontally above openings provided in portions of the growth inhibiting layer be exploited to reduce vertically propagating crystal defects (U.S. Pat. No. 6,051,849). However, in this method, the steps of forming a GaN growth-blocking layer and the fashioning of holes therein become necessary, increasing the cost of manufacturing. Further, since the GaN above the openings has the property of propagating with the crystal defects within it remaining intact, crystal defects are not completely eliminated.
Accordingly, the object of the present invention is to provide a method of manufacturing compound single crystals by epitaxially growing a compound single crystal layer differing from the substrate in which the planar defects generated in the crystal that is epitaxially grown are reduced.